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Motorola 6809 Instruction Set
ADCA, ADCB

Add memory to accumulator with carry

ADDA, ADDB

Add memory to accumulator

ANDA, ANDB

And memory with accumulator

ASL, ASIA, ASLB

Arithmetic shift of accumulator or memory left

ASR, ASRA, ASRB

Arithmetic shift of accumulator or memory right

BITA, BITB

Bit test memory with accumulator

CLR, CLRA, CLRB

Clear accumulator or memory location

CMPA, CMPB

Compare memory from accumulator

COM, COMA, COMB

Complement accumulator or memory location

DAA

Decimal adjust A accumulator

DEC, DECA, DECB

Decrement accumulator or memory location

EORA, EORB

Exclusive or memory with accumulator

EXG R1, R2

Exchange R1 with R2 (R1, R2 = A, B, CC, DP)

INC, INCA, INCB

Increment accumulator or memory location

LDA, LDB

Load accumulator from memory

LSI, LSLA, LSLB

Logical shift left accumulator or memory location

LSR, LSRA, LSRB

Logical shift right accumulator or memory location

MUL

Unsigned multiply (A x B — D)

NEC, ♥♥♥♥, NEGB

Negate accumulator or memory

ORA, ORB

Or memory with accumulator

ROL, ROLA, ROLB

Rotate accumulator or memory left

ROR, RORA, RORB

Rotate accumulator or memory right

SBCA, SBCB

Subtract memory from accumulator with borrow

STA, STB

Store accumulator to memory

SUBA, SUBB

Subtract memory from accumulator

TST, TSTA, TSTB

Test accumulator or memory location

TFR R1, R2

Transfer R1 to R2 (R1, R2 = A, B, CC, DP)

NOTE; A, B, CC, or DP may be pushed to (pulled from) stack with either PSHS, PSHU (PULS,PULU) instructions.

ADDD

Add memory to D accumulator

CMPD

Compare memory from D accumulator

EXG D, R

Exchange D with X, Y, S, U, or PC [/h1]

LDD

Load D accumulator from memory

SEX

Sign Extend B accumulator into A accumulator

STD

Store D accumulator to memory

SUBD

Subtract memory from D accumulator

TFR D, R

Transfer D to X, Y, S, U, or PC

TFR R, D

Transfer X, Y, S, U, or PC to D

NOTE: D may be pushed (pulled) to stack with either PSHS, PSHU (PULS, PULU) instructions.

CMPS, CMPU

Compare memory from stack pointer

CMPX, CMPY

Compare memory from index register

EXG R1, R2

Exchange D, X, Y, X, U, or PC with D, X Y, S, U, or PC

LEAS, LEAU

Load effective address into stack pointer

LEAX, LEAY

Load effective address into index register

LDS, LDU

Load stack pointer from memory

LDX, LDY

Load index register from memory

PSHS

Push A, B, CC, DP, D, X, Y, U, or PC onto hardware stack

PSHU

Push A, B, CC, DP, D, X, Y, S, or PC onto user stack

PULS

Pull A, B, CC, DP, D, X, Y, U, or PC from hardware stack

PULU

Pull A, B, CC, DP, D, X, Y, S, or PC from hardware stack

STS, STU

Store stack pointer to memory

STX, STY

Store index register to memory

TFR R1, R2

Transfer D, X, Y, S, U or PC to D. X, Y, S, U, or PC

ABX

Add B accumulator to X (unsigned!

BEQ, LBEQ

Branch if equal

BNE, LBNE

Branch if not equal

BMI, LBMI

Branch if minus

BPL, LBPL

Branch if plus

BCS, LBCS

Branch if carry set.

BCC, LBCC

Branch if carry clear

BVS, LBVS

Branch if overflow set

BVC, LBVC

Branch if overflow clear

BGT, LBGT

Branch if greater (signed)

BVS, LBVS

Branch if invalid 2s complement result

BGE, LBGE

Branch if greater than or equal (signed)

BEQ, LBEQ

Branch if equal

BNE, LBNE

Branch if not equal

BLE, LBLE

Branch if less than or equal (signed)

BVC, LBVC

Branch if valid 2s complement result

BLT, LBLT

Branch if less than (signed)

BHI, LBHI

Branch if higher (unsigned)

BCC, LBCC

Branch if higher or same (unsigned)

BHS, LBHS

Branch if higher or same (unsigned)

BEQ, LBEQ

Branch if equal

BNE, LBNE

Branch if not equal

BLS, LBLS

Branch if lower or same (unsigned)

BCS, LBCS

Branch if lower (unsigned)

BLO, LBLO

Branch if lower (unsigned)

BSR, LBSR

Branch to subroutine

BRA, LBRA

Branch always

BRN, LBRN

Branch never

ANDCC

AND condition code register

CWAI

AND condition code register, then wait for interrupt

NOP

No operation

ORCC

OR condition code register

JMP

Jump

JSR

Jump to subroutine

RTI

Return from interrupt

RTS

Return from subroutine

SWI, SWI2, SWI3

Software interrupt (absolute indirect)

SVNC

Synchronize with interrupt line
TTV.DoggoDogPack 14 Thg06, 2013 @ 1:52pm 
I am a turtle.
Aluminum Peanut 5 Thg05, 2013 @ 5:53pm 
thx bby.
shanisgodzilla 26 Thg12, 2012 @ 11:47pm 
LETZ BE FRANDS
Elegant Metal 30 Thg10, 2012 @ 9:28pm 
Hey there, Sexy ;D
gatorleggin 17 Thg02, 2011 @ 9:49pm 
pleas comment here.....
gatorleggin 17 Thg02, 2011 @ 9:43pm 
thats not gold